1. Field of the Invention
This invention relates in general to the field of operating systems in digital computers, and in particular, to an apparatus and method for saving and restoring state during task switching.
2. Description of Related Art
In multitasking operating systems (OS), it is common to switch tasks as often as necessary. The task switching is typically managed by task management facilities. Task switching essentially refers to the process of transferring the use of the processor from one task to the next. A task may be postponed, deferred, or terminated during task switching. If a task is postponed or deferred, it is important that all the relevant information about the task is restored when the task resumes its use of the processor.
Saving and restoring the state of the processor during task switching are two important activities for an efficient multitasking OS. When there are many tasks that are switched into and out of the OS, the time spent for saving and restoring the processor's state may be significant.
The state of the processor for a particular task is determined by the contents of various control/status registers and data registers. The Intel Architecture (IA) provides a rich set of registers including the aliased floating-point (FP) and integer packed data registers. These registers are to be saved during a context switch. Saving these registers in the prior art IA has a number of drawbacks.
First, the format of the saved memory image depends on the operating mode of the processor (e.g., protected mode, real-address mode) and on the operand-size attribute in effect (e.g., 32-bit, 16-bit). Therefore, the saving of the processor's state requires branching in the microcode which results in long processing time and inefficient memory usage.
Second, the prior art IA saves the Floating-Point Unit (FPU) tag word as eight 2-bit encodings. This process incurs undesirable time for performing the valid bit to 2-bit encoding translation.
Third, the prior art IA state saving automatically initializes the floating-point unit by loading default values into the FPU control word, FPU status word, FPU tag word, data pointer, instruction pointer, and last instruction opcode. This initialization step is time consuming and in many cases is unnecessary.
Lastly, the memory image saved by the prior art IA has irregular address boundaries. This creates inefficient memory allocation and increased software overhead.
Therefore there is a need in the technology to provide an improved and efficient mechanism to save and restore processor's state during a context switch.